Towards Integration of a Dedicated Memory Controller and Its Instruction Set to Improve Performance of Systems Containing Computational SRAM

In-memory computing (IMC) aims to solve the performance gap between CPU and memories introduced by memory wall. However, it does not address energy wall problem caused data transfer over hierarchies. This paper proposes data-locality management unit (DMU) efficiently from a DRAM computational SRAM (C-SRAM) allowing IMC operations. The DMU is tightly coupled within C-SRAM allows one align structure in order perform effective in-memory computation. We propose dedicated instruction set issue transfers. evaluation of system integrating compared reference scalar architecture shows an increase ×5.73 ×11.01 speed-up ×29.49 ×46.67 reduction, versus without any mechanism architecture.